Credence Embedded Memory Test
Credence Systems Corp. announced the introduction of a new cross-platform system enhancement, the Algorithmic Pattern Processor (APP). Currently shipping as an option for their Duo, SC and Vista product lines, the system will debut at SEMICON West 98 with product demonstrations at the Test, Assembly & Packaging venue in San Jose Convention Center on July 15-17 (Booth No. 11927).
The most significant differences between embedded memory arrays and standalone memory devices are word width and operating speed. Embedded arrays generally have very wide word widths and operate at speeds of over 100 Mhz. With the Credence APP solution there is no limitation on the word width of the memory test pattern. The Credence APP also operates at the I/O speed of the test system.
Ideal for volume production and engineering characterization applications, the APP consists of a standalone off-line pattern generation tool that enables the generation of sophisticated patterns based on any of the standard memory test algorithms or a custom algorithm defined by the user. This tool allows the user to select data output format compatible with the company's Vista, Duo, SC, ValStar and Quartet test systems. Since this is an offline tool the generation of embedded memory patterns has no impact on test time or test system utilization.
Another component of the APP is the data analysis hardware and software package. Developed in conjunction with Heuristic Physics Laboratories (HPL), a provider of yield enhancement and failure analysis tools for memory array testing, this portion of the APP offers a comprehensive set of analysis tools. These tools include graphical bitmapping, wafer mapping and the redundancy calculation algorithms required for devices with repair capability. In addition, APP is compatible with HyperView, HPL's yield analysis system that utilizes data from throughout the front-end and back-end circuit processing steps, including physical design, defect, WIP, sort/parametric, and bitmap. The data analysis workstation is also a central resource to the test floor, offering a cost-effective solution to debugging and failure analysis.
Heuristics Physics Laboratories Inc.(HPL) is a privately owned company headquartered in Milpitas, CA.