IMP and National Instruments High-Voltage SOI Process
N/Aounced the signing of a joint technology and circuit development agreement with <%=company%>. The program will develop a new Silicon-on-Insulator (SOI) wafer manufacturing process that provides both high-voltage capability as well as unique circuit isolation benefits. On completion of the IMP technology development phase, IMP will use the SOI technology to produce analog ICs designed by National Instruments and other IMP foundry customers.
National Instrument's products will be built on a new Silicon-on-Insulator (SOI) process. Modern SOI technology uses thin, oxide-isolated silicon layers on bonded wafers allowing the integration of very high voltage devices and fine-geometry drive circuitry on the same chip. The result is a versatile technology for system integration, allowing circuit isolation and high-voltage capability.
Products are manufactured on CMOS, BiCMOS, and EEPROM processes in IMP's ISO 9001 qualified wafer fabrication plant in San Jose.
IMP Inc., Phone: 888-323-2019.
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