JTAG/Boundary Scan Module Enables Structural Tests Of DDR2 Mini DIMM244 Interfaces
Jena, Germany - GOEPEL electronic, vendor of JTAG/Boundary Scan solutions compliant with IEEE Std.1149.x, officially announced the market introduction of Module/DIMM244so as another I/O module of the CION product family. 
The new digital low cost module is serially controlled via TAP by special CION ASIC chips, and enables the testing of all signal and voltage supply pins of JEDEC Std. (JESD79-2C) compliant DDR2 Mini DIMM 244 sockets. "The opportunity to test DDR2 Mini DIMM 244 interfaces was on the top of our customer's wish list", says Raj Puri, Vice President Marketing and Sales for GOEPEL electronics LLC. "These new CION modules provide a cost effective solution for applications in laptops, PC's and work stations."
The CION Module/DIMM244so is plugged directly into the sockets to be tested, whereby the voltage adaptation of the interface steps is done automatically. Because the modules are equipped with transparent TAP, several boards of the same or different types can be cascaded in a Daisy Chain configuration. The structural Boundary Scan test of all DIMM 244 signal and voltage supply pins are executed by the on-board CION ASIC ICs. All channels can be independently switched as Input/Output/Tristate.
To ensure protection of test equipment and unit under test (UUT), CION Module/DIMM244so provides special safety mechanisms such as "UNSTRESS" to prevent damages in case of shorts, extended power yield and voltage programmable TAP.
These features guarantee not only a high reliability and flexibility but also outstanding safety and extendibility. The new hardware module is completely supported by all JTAG/Boundary Scan controllers of the ScanBooster and SCANFLEX families as well the integrated Boundary Scan software platform SYSTEM CASCON. Since more than 10 years, SYSTEM CASCON is the most innovative Integrated JTAG/Boundary Scan Development Environment with more than 35 fully integrated tools. Users are now able to easily integrate the CION Module/DIMM244so into a respective test project with fully automatically generated test vectors. Any faults can be interactively debugged and visualised graphically at pin and net level in the layout and schematic.
SOURCE: GOEPEL electronic