SUSS MicroTec Announces Completion Of Initial C4NP Reliability Testing

Munich, Germany -- SUSS MicroTec announced that initial reliability testing with IBM for 300mm lead free C4NP solder bumped wafers has been completed successfully. SUSS is currently building a high volume manufacturing C4NP tool set for IBM in preparation for production use.

C4NP stands for Controlled Collapse Chip Connection - New Process and is the next generation of wafer bumping technology developed by IBM. Pioneered by IBM, C4NP is a breakthrough in wafer solder bump technology, a semiconductor packaging technique that places pre-patterned solder balls onto the surface of a chip. These bumps ultimately carry data from individual chips to the rest of a computing system. C4NP is a simple and cost-effective alternative to the expensive and difficult electroplating process. Bulk solder is injection molded into glass molds and subsequently transferred from mold to wafer in a single step. C4NP combines the simplicity and cost effectiveness of solder paste printing with the fine pitch capabilities of electroplating and is a key enabler of 300mm lead-free solder bumping.

In this reliability testing, 300mm wafers were bumped with SnCu and SnAg solders using a 200 micron pitch with 1.3 million bumps per wafer test vehicle. 14.7 mm square chips were joined to organic buildup chip carriers and subjected to the following tests:

a. JEDEC moisture level 3 preconditioning
b. Shock and vibration
c. Deep thermal cycling (-55 to + 125 C)
d. HAST and THB moisture stressing
e. High temperature storage
f. Electromigration
g. Wettability
h. Construction analysis
i. Alpha emissions

No failures were attributed to the C4NP process.

SOURCE: SUSS MicroTec