Virtual Silicon Technology (Sunnyvale, CA) and TSMC today announced a 0.18-micron test-chip that demonstrates the manufacturability of Virtual Silicon's TSMC-specific libraries using TSMC's 0.18-micron, six level metal process. The test chip validates the reliability and performance of TSMC's advanced manufacturing process as realized using Virtual Silicon's libraries and test structures.
The 0.18-micron working silicon measurements have shown correct functionality with timing correlation with a difference of less than five percent between design kit simulations and actual measured silicon performance. I/O functionality and slew rate control perform as per simulation predictions. Reliability data exhibit over 300mA latch-up immunity at high temperature and over 4KV ESD protection.
Evaluation kits for 0.18-micron libraries are available from Virtual Silicon immediately. Standard cell and memory compilers for TSMC 0.18-micron will be available starting in June 1999. Virtual Silicon's libraries for TSMC 0.25-micron are available immediately. Testchip reports are available to TSMC customers under non-disclosure with Virtual Silicon.
Virtual Silicon licenses and supports TSMC-specific libraries under a variety of flexible end-user licensing arrangements.
TSMC is a dedicated integrated circuit (IC) foundry and offers a comprehensive set of IC fabrication processes, including processes to manufacture CMOS logic, mixed-mode, volatile and non-volatile memory and BiCMOS chips.
Virtual Silicon Technology develops, markets, and supports Silicon Ready libraries, physical design components, and services for complex integrated circuits in 0.25 and 0.18-micron semiconductor process technologies.
The company provides process-specific and foundry-portable versions of its Diplomat libraries and "hard" IP to ASIC manufacturers, ASSP designers, and systems developers who demand the highest quality, maximum performance, and optimum densities for their semiconductor innovations.
Virtual Silicon Technology, Phone: 408/548-2726.